CAMPBELL, CA--(Marketwired - Sep 5, 2013) - Silicon Frontline Technology, Inc. (SFT) an Electronic Design Automation (EDA) company in the post-layout verification market, announced today that Lattice ...
Electrostatic discharge (ESD) is a major reliability concern for integrated circuit (IC) designs. ESD verification is proving to be a significant challenge at advanced nodes, due to growing IC design ...
As the semiconductor industry transitions to finFETs, reliability challenges are increasing. ESD designers are challenged with new issues that would require significant rethinking and redesign of ...
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